I2C-compatible Bus Description

The IS4310 operates as a slave in the I2C-Serial Interface. It supports Standard Mode (100kHz), Fast Mode (400kHz), and Fast Mode Plus (1MHz). The I2C-master device, typically a microcontroller or a single board computer, initiates and manages all read and write operations to the Slave.

Pull-up resistors are required on the SCL and SDA lines for proper operation. The resistor values depend on the bus capacitance and operating speed. Typical values are 10kΩ for Standard Mode (100kHz) and 2kΩ for Fast Mode and Fast Mode Plus (400kHz and 1MHz).

The IS4310's high state can be either 3.3V or 5V. A logical '0' is transmitted by pulling the line low, while a logical '1' is transmitted by releasing the line, allowing it to be pulled high by the pull-up resistor. The Master controls the Serial Clock (SCL) line, which generates the synchronous clock used by the Serial Data (SDA) line to transmit data.

A Start or Stop condition occurs when the SDA line changes during the High period of the SCL line. Data on the SDA line must be 8 bits long and is transmitted Most Significant Bit First and Most Significant Byte First. After the 8 data bits, the receiver must respond with either an acknowledge (ACK) or a no-acknowledge (NACK) bit during the ninth clock cycle, which is generated by the Master. To keep the bus in an idle state, both the SCL and SDA lines must be released to the High state.

The operability of the Read and Write commands of the IS4310 is very similar to an EEPROM memory. Thinking of the IS4310 as an EEPROM memory is a good analogy to quickly understand how to communicate with the device.

Summary

• I2C Device Address: 17 (0x11)

• Compatible I2C Speeds:

  • Standard Mode (100kHz)

  • Fast Mode (400kHz)

  • Fast Mode Plus (1MHz)